Why Are Spike Times More Reliable Under Time-Varying Input in Analog Spiking Neurons?

Constant current accumulates jitter, time-varying input resets it

The paper's central comparison is between two ways of driving the same ultra-low-power CMOS analog spiking neuron, a simplified Morris-Lecar design in 65 nm technology with a 200 mV supply. Under a constant supra-threshold current pulse of 20 pA, the neuron behaves like a self-running oscillator: it emits a spike train on node vGK with a mean inter-spike interval of about 32 µs, and the variability of successive spike edges grows with spike number.

When the same neuron is instead excited by a frozen filtered white Gaussian noise current whose constant component is 5 pA, below the roughly 7 pA excitability threshold, the firing pattern becomes irregular and the neuron no longer oscillates on its own. In the raster plot, almost all spike times line up vertically across the 25 displayed trials, meaning the accumulated jitter seen in the oscillatory case is largely absent.

The paper frames this as a replication, in simulation, of classic neuroscience results: Bryant and Segundo, and Mainen and Sejnowski, reported that some biological neurons time their spikes more reliably under time-varying stimuli than under constant ones. The contribution here is showing the same behavior in a CMOS neuron intended for neuromorphic hardware, using physics-based transient noise simulation rather than an abstract mathematical model.

Jitter is measured from the first spike, not per interval

The paper is careful about which quantity it reports. To remove dependence on initial conditions and the circuit's power-up phase, it studies spike time differences from the first spike: T2 − T1, T3 − T1, and so on, then computes Var{Tn − T1} for n ≥ 2 across trials. This is the n-period or accumulated jitter, a different quantity from the period jitter, which is the variance of a single inter-spike interval.

In the oscillatory regime the two are linked by a simple relation: Var{Tn − T1} ≈ (n − 1) · Var{T2 − T1}, with Var{T2 − T1} equal to the period jitter. The orange straight line representing this relation matches the simulation results closely, which the authors read as evidence that the accumulated jitter is dominated by white, time-decorrelated noise sources, corresponding to the thermal noise of the MOS transistors.

The variance was estimated from 1000 successive trials, even though only 25 trials appear in the raster figures. A slight deviation from the linear relation appears from about n ≈ 25, which the authors attribute to time-correlated 1/f noise. They also note that transistor-to-transistor variability in low-frequency noise magnitude leaves the universality of the linear relation open.

Noise comes from foundry transistor models, not added by hand

The method matters for interpreting the result. The authors use an industrial SPICE transient noise framework, NOISETRAN, compatible with foundry transistor compact models. It adds an individual physical noise source in parallel with each MOS transistor, with state-dependent intensity given by the foundry model, generates random values at each time step, and then solves the circuit's nonlinear differential-algebraic equations in the time domain.

This differs from older theoretical work that adds a white Gaussian process of fixed predefined intensity to simplified neuron equations. Because the noise intensity here depends on transistor state, the simulation captures the state dependency of noise sources in nonlinear electronic devices, which the authors present as a missing piece in the literature.

The simulation used a time step of 1 ns and an intrinsic transistor noise bandwidth of 500 MHz. As an order-of-magnitude check, the authors estimate the integrated thermal noise on a node voltage at equilibrium as √(kT/C), with T = 300 K and the effective membrane capacitance extracted in their earlier work, giving a standard deviation of about 0.7 mV while the membrane voltage swings from 0 to almost 200 mV. That is a typical fluctuation just below 1%.

Each spike becomes a discrete event instead of a phase error

The authors' explanation for the reliability difference is mechanistic. In the oscillatory regime, the neuron runs repeated cycles and phase error accumulates from one cycle to the next, so jitter grows with spike number. In the excitability regime, the neuron sits at rest until input fluctuations push it above threshold, so each spike is a discrete event produced by a state transition rather than the next tick of a free-running clock.

The paper describes this as a controlled state-transition mechanism, and attributes the reduced jitter to the resetting action of that transition. The authors explicitly label this attribution as their presumption, noting that a detailed study of the neuronal dynamics is left to future work.

The evidence also shows where the mechanism is weakest. The 4th and 15th spikes are naturally more prone to timing variability for the particular frozen input used, and the 2nd and 16th spikes show greater variability to a smaller extent. The authors suggest these transitions from resting to spiking are significantly influenced by the circuit's intrinsic noise, similar to stochastic state transitions in bistable memories, and treat the 4th and 15th spikes as outliers in the jitter discussion.

A thermodynamic relation bounds the oscillatory regime

The paper brings in a stochastic thermodynamic uncertainty relation to argue that the reliability problem of the oscillatory regime is not merely an engineering shortcoming. The relation derives from a local detailed balance principle for overdamped time-homogeneous Markov processes in contact with a thermal bath at temperature T, where the ratio of forward to time-reversed trajectory probabilities is set by the dissipated energy divided by kT.

The authors argue the neuronal circuit qualifies as overdamped because it contains only nonlinear dissipative components and capacitances, including transistor internal capacitances, and no inductors. On that basis, the uncertainty relation is used to highlight a reliability-dissipation tradeoff in the oscillatory or rate-coding regime.

The important boundary is stated by the authors themselves: the relation does not apply to the excitability configuration, because spiking there is a non-stationary process. Their interpretation is that the physical limitations thermodynamics imposes on the oscillatory regime are alleviated in the excitability regime, not that the excitability regime has been shown to beat a proven bound.

Simulation evidence, one design, and an unproven optimality claim

All results come from transient noise simulations of a single CMOS neuron design in 65 nm technology, retaining the deterministic parameters of the earlier model, including transistor dimensions and the 200 mV supply. The paper does not report silicon measurements, and the authors describe the work as a preliminary numerical study.

The comparison between regimes is also not a like-for-like input comparison. The oscillatory case uses a constant 20 pA supra-threshold pulse, while the time-varying case uses a frozen filtered white Gaussian noise with a 5 pA sub-threshold constant component, a standard deviation of 20 pA, and a filter time constant of 5 µs chosen relative to the CMOS neuron's time scale to resemble the neuroscience stimulus. The frozen input is identical across trials, so it acts as a deterministic time-varying signal even though it was built randomly.

The authors further suggest that a possibly random time-varying input could be the solution to an optimal control problem minimizing jitter and energy consumption, but they present this as a suggestion, not a demonstrated result. The thermodynamic uncertainty relation is likewise applied as an interpretive lens on the oscillatory regime rather than validated as a predictive model of the excitability regime.

Judge reliability by regime, not by neuron alone

The decision-relevant split in this paper is between operating regimes of the same device, not between devices. If a CMOS analog spiking neuron is driven by a constant supra-threshold current, it behaves as an oscillator whose accumulated jitter grows approximately linearly with spike index, consistent with white thermal noise dominating and with a thermodynamic reliability-dissipation tradeoff. If it is held below threshold and driven by a time-varying input, spikes become discrete threshold-triggered events and the accumulated jitter largely disappears.

That reframes how to read reliability claims for neuromorphic hardware. A jitter figure quoted for an oscillatory, rate-coding configuration should not be transferred to an excitability configuration of the same neuron, and the paper's own thermodynamic argument says the oscillatory limit does not carry over to the non-stationary excitability case.

The most useful next check is also the paper's own open item: the authors plan to model the neuronal dynamics to validate their assumptions about the two spiking mechanisms and to predict the underlying spike time statistics. Until then, the strongest supported statement is a regime comparison under simulation, with the 4th and 15th spikes of the specific frozen input flagged as the transitions most sensitive to intrinsic noise.

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